Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems

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Publisher : Springer Science & Business Media
ISBN 13 : 0306487268
Total Pages : 270 pages
Book Rating : 4.62/5 ( download)

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Book Synopsis Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems by : Keh-La Lin

Download or read book Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems written by Keh-La Lin and published by Springer Science & Business Media. This book was released on 2006-01-14 with total page 270 pages. Available in PDF, EPUB and Kindle. Book excerpt: One of the main trends of microelectronics is toward design for integrated systems, i.e., system-on-a-chip (SoC) or system-on-silicon (SoS). Due to this development, design techniques for mixed-signal circuits become more important than before. Among other devices, analog-to-digital and digital-to-analog converters are the two bridges between the analog and the digital worlds. Besides, low-power design technique is one of the main issues for embedded systems, especially for hand-held applications. Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter for Embedded Systems aims at design techniques for low-power, high-speed analog-to-digital converter processed by the standard CMOS technology. Additionally this book covers physical integration issues of A/D converter integrated in SoC, i.e., substrate crosstalk and reference voltage network design.

Systematic Design of Sigma-Delta Analog-to-Digital Converters

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Publisher : Springer Science & Business Media
ISBN 13 : 9781402079450
Total Pages : 216 pages
Book Rating : 4.51/5 ( download)

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Book Synopsis Systematic Design of Sigma-Delta Analog-to-Digital Converters by : Ovidiu Bajdechi

Download or read book Systematic Design of Sigma-Delta Analog-to-Digital Converters written by Ovidiu Bajdechi and published by Springer Science & Business Media. This book was released on 2004-04-30 with total page 216 pages. Available in PDF, EPUB and Kindle. Book excerpt: Systematic Design of Sigma-Delta Analog-to-Digital Converters describes the issues related to the sigma-delta analog-to-digital converters (ADCs) design in a systematic manner: from the top level of abstraction represented by the filters defining signal and noise transfer functions (STF, NTF), passing through the architecture level where topology-related performance is calculated and simulated, and finally down to parameters of circuit elements like resistors, capacitors, and amplifier transconductances used in individual integrators. The systematic approach allows the evaluation of different loop filters (order, aggressiveness, discrete-time or continuous-time implementation) with quantizers varying in resolution. Topologies explored range from simple single loops to multiple cascaded loops with complex structures including more feedbacks and feedforwards. For differential circuits, with switched-capacitor integrators for discrete-time (DT) loop filters and active-RC for continuous-time (CT) ones, the passive integrator components are calculated and the power consumption is estimated, based on top-level requirements like harmonic distortion and noise budget. This unified, systematic approach to choosing the best sigma-delta ADC implementation for a given design target yields an interesting solution for a high-resolution, broadband (DSL-like) ADC operated at low oversampling ratio, which is detailed down to transistor-level schematics. The target audience of Systematic Design of Sigma-Delta Analog-to-Digital Converters are engineers designing sigma-delta ADCs and/or switched-capacitor and continuous-time filters, both beginners and experienced. It is also intended for students/academics involved in sigma-delta and analog CAD research.

CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters

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Publisher : Springer Science & Business Media
ISBN 13 : 1475737688
Total Pages : 628 pages
Book Rating : 4.84/5 ( download)

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Book Synopsis CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters by : Rudy J. van de Plassche

Download or read book CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters written by Rudy J. van de Plassche and published by Springer Science & Business Media. This book was released on 2013-04-17 with total page 628 pages. Available in PDF, EPUB and Kindle. Book excerpt: CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters describes in depth converter specifications like Effective Number of Bits (ENOB), Spurious Free Dynamic Range (SFDR), Integral Non-Linearity (INL), Differential Non-Linearity (DNL) and sampling clock jitter requirements. Relations between these specifications and practical issues like matching of components and offset parameters of differential pairs are derived. CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters describes the requirements of input and signal reconstruction filtering in case a converter is applied into a signal processing system. CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters describes design details of high-speed A/D and D/A converters, high-resolution A/D and D/A converters, sample-and-hold amplifiers, voltage and current references, noise-shaping converters and sigma-delta converters, technology parameters and matching performance, comparators and limitations of comparators and finally testing of converters.

Low-Power Deep Sub-Micron CMOS Logic

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Publisher : Springer Science & Business Media
ISBN 13 : 1402028490
Total Pages : 165 pages
Book Rating : 4.96/5 ( download)

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Book Synopsis Low-Power Deep Sub-Micron CMOS Logic by : P. van der Meer

Download or read book Low-Power Deep Sub-Micron CMOS Logic written by P. van der Meer and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 165 pages. Available in PDF, EPUB and Kindle. Book excerpt: 1. 1 Power-dissipation trends in CMOS circuits Shrinking device geometry, growing chip area and increased data-processing speed performance are technological trends in the integrated circuit industry to enlarge chip functionality. Already in 1965 Gordon Moore predicted that the total number of devices on a chip would double every year until the 1970s and every 24 months in the 1980s. This prediction is widely known as "Moore's Law" and eventually culminated in the Semiconductor Industry Association (SIA) technology road map [1]. The SIA road map has been a guide for the in dustry leading them to continued wafer and die size growth, increased transistor density and operating frequencies, and defect density reduction. To mention a few numbers; the die size increased 7% per year, the smallest feature sizes decreased 30% and the operating frequencies doubled every two years. As a consequence of these trends both the number of transistors and the power dissi pation per unit area increase. In the near future the maximum power dissipation per unit area will be reached. Down-scaling of the supply voltage is not only the most effective way to reduce power dissipation in general it also is a necessary precondition to ensure device reliability by reducing electrical fields and device temperature, to prevent device degradation. A draw-back of this solution is an increased signal propa gation delay, which results in a lower data-processing speed performance.

Low Power Analog CMOS for Cardiac Pacemakers

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Publisher : Springer Science & Business Media
ISBN 13 : 1475756836
Total Pages : 217 pages
Book Rating : 4.38/5 ( download)

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Book Synopsis Low Power Analog CMOS for Cardiac Pacemakers by : Fernando Silveira

Download or read book Low Power Analog CMOS for Cardiac Pacemakers written by Fernando Silveira and published by Springer Science & Business Media. This book was released on 2013-03-09 with total page 217 pages. Available in PDF, EPUB and Kindle. Book excerpt: Low Power Analog CMOS for Cardiac Pacemakers proposes new techniques for the reduction of power consumption in analog integrated circuits. Our main example is the pacemaker sense channel, which is representative of a broader class of biomedical circuits aimed at qualitatively detecting biological signals. The first and second chapters are a tutorial presentation on implantable medical devices and pacemakers from the circuit designer point of view. This is illustrated by the requirements and solutions applied in our implementation of an industrial IC for pacemakers. There from, the book discusses the means for reduction of power consumption at three levels: base technology, power-oriented analytical synthesis procedures and circuit architecture.

Dynamic Characterisation of Analogue-to-Digital Converters

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Publisher : Springer Science & Business Media
ISBN 13 : 0387259031
Total Pages : 291 pages
Book Rating : 4.31/5 ( download)

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Book Synopsis Dynamic Characterisation of Analogue-to-Digital Converters by : Dominique Dallet

Download or read book Dynamic Characterisation of Analogue-to-Digital Converters written by Dominique Dallet and published by Springer Science & Business Media. This book was released on 2006-03-08 with total page 291 pages. Available in PDF, EPUB and Kindle. Book excerpt: The Analogue-to-digital converter (ADC) is the most pervasive block in electronic systems. With the advent of powerful digital signal processing and digital communication techniques, ADCs are fast becoming critical components for system’s performance and flexibility. Knowing accurately all the parameters that characterise their dynamic behaviour is crucial, on one hand to select the most adequate ADC architecture and characteristics for each end application, and on the other hand, to understand how they affect performance bottlenecks in the signal processing chain. Dynamic Characterisation of Analogue-to-Digital Converters presents a state of the art overview of the methods and procedures employed for characterising ADCs’ dynamic performance behaviour using sinusoidal stimuli. The three classical methods – histogram, sine wave fitting, and spectral analysis – are thoroughly described, and new approaches are proposed to circumvent some of their limitations. This is a must-have compendium, which can be used by both academics and test professionals to understand the fundamental mathematics underlining the algorithms of ADC testing, and as an handbook to help the engineer in the most important and critical details for their implementation.

Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems

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Publisher : Springer Science & Business Media
ISBN 13 : 1475737017
Total Pages : 207 pages
Book Rating : 4.11/5 ( download)

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Book Synopsis Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems by : Vincent S.L. Cheung

Download or read book Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems written by Vincent S.L. Cheung and published by Springer Science & Business Media. This book was released on 2013-03-14 with total page 207 pages. Available in PDF, EPUB and Kindle. Book excerpt: This volume emphasizes the design and development of advanced switched-opamp architectures and techniques for low-voltage low-power switched-capacitor systems. It presents a novel multi-phase switched-opamp technique together with new system architectures that are critical in improving significantly the performance of switched-capacitor systems at low supply voltages.

Static and Dynamic Performance Limitations for High Speed D/A Converters

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Publisher : Springer Science & Business Media
ISBN 13 : 1475765797
Total Pages : 229 pages
Book Rating : 4.93/5 ( download)

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Book Synopsis Static and Dynamic Performance Limitations for High Speed D/A Converters by : Anne van den Bosch

Download or read book Static and Dynamic Performance Limitations for High Speed D/A Converters written by Anne van den Bosch and published by Springer Science & Business Media. This book was released on 2013-06-29 with total page 229 pages. Available in PDF, EPUB and Kindle. Book excerpt: Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters. Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations are suggested to optimize this performance. Furthermore, a new closed formula has been derived to account for the influence of the transistor mismatch on the achievable resolution of the current-steering D/A converter. To allow a thorough understanding of the dynamic behavior, a new factor has been introduced. Moreover, the frequency dependency of the output impedance introduces harmonic distortion components which can limit the maximum attainable spurious free dynamic range. Finally, the last part of the book gives an overview on different existing transistor mismatch models and the link with the static performance of the D/A converter.

High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications

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Publisher : Springer
ISBN 13 : 3319620126
Total Pages : 171 pages
Book Rating : 4.21/5 ( download)

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Book Synopsis High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications by : Weitao Li

Download or read book High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications written by Weitao Li and published by Springer. This book was released on 2017-08-01 with total page 171 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.

Low-Voltage CMOS Log Companding Analog Design

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Publisher : Springer Science & Business Media
ISBN 13 : 0306487217
Total Pages : 209 pages
Book Rating : 4.17/5 ( download)

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Book Synopsis Low-Voltage CMOS Log Companding Analog Design by : Francisco Serra-Graells

Download or read book Low-Voltage CMOS Log Companding Analog Design written by Francisco Serra-Graells and published by Springer Science & Business Media. This book was released on 2006-04-18 with total page 209 pages. Available in PDF, EPUB and Kindle. Book excerpt: Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSFET operating in the subthreshold region. The former allows inner compression of the voltage dynamic-range for very low-voltage operation, while the latter is compatible with CMOS technologies and suitable for low-power circuits. The required background on the specific modeling of the MOS transistor for Companding is supplied at the beginning. Following this general approach, a complete set of CMOS basic building blocks is proposed and analyzed for a wide variety of analog signal processing. In particular, the covered areas include: amplification and AGC, arbitrary filtering, PTAT generation, and pulse duration modulation (PDM). For each topic, several case studies are considered to illustrate the design methodology. Also, integrated examples in 1.2um and 0.35um CMOS technologies are reported to verify the good agreement between design equations and experimental data. The resulting analog circuit topologies exhibit very low-voltage (i.e. 1V) and low-power (few tenths of uA) capabilities. Apart from these specific design examples, a real industrial application in the field of hearing aids is also presented as the main demonstrator of all the proposed basic building blocks. This system-on-chip exhibits true 1V operation, high flexibility through digital programmability and very low-power consumption (about 300uA including the Class-D amplifier). As a result, the reported ASIC can meet the specifications of a complete family of common hearing aid models. In conclusion, this book is addressed to both industry ASIC designers who can apply its contents to the synthesis of very low-power systems-on-chip in standard CMOS technologies, as well as to the teachers of modern circuit design in electronic engineering.